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353
Exp01/Core/Src/stm32h7xx_it.c
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353
Exp01/Core/Src/stm32h7xx_it.c
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32h7xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32h7xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "SEMAPHORE.h"
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#include "ESPE_USART_0.h"
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#include "ADC_READ.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern DMA_HandleTypeDef hdma_adc3;
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extern ADC_HandleTypeDef hadc3;
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extern TIM_HandleTypeDef htim6;
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extern TIM_HandleTypeDef htim7;
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extern DMA_HandleTypeDef hdma_usart3_tx;
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extern UART_HandleTypeDef huart3;
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/* USER CODE BEGIN EV */
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uint16_t results[N_MEAS+1]; //data + begin pos
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uint8_t TA = 0; // trigger active
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uint8_t TR = 0; // trigger ready
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uint8_t POS = 0; // buffer index at trigger time
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uint8_t FULL= 0 ; // begin
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uint8_t indx= 0;
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uint16_t tmp;
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typedef struct {
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uint8_t active: 1;
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uint8_t ready : 1;
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uint8_t full : 1;
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} Stato;
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles System service call via SWI instruction.
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*/
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void SVC_Handler(void)
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{
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/* USER CODE BEGIN SVCall_IRQn 0 */
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/* USER CODE END SVCall_IRQn 0 */
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/* USER CODE BEGIN SVCall_IRQn 1 */
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/* USER CODE END SVCall_IRQn 1 */
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/**
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* @brief This function handles Pendable request for system service.
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*/
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void PendSV_Handler(void)
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{
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/* USER CODE BEGIN PendSV_IRQn 0 */
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/* USER CODE END PendSV_IRQn 0 */
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/* USER CODE BEGIN PendSV_IRQn 1 */
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/* USER CODE END PendSV_IRQn 1 */
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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/* USER CODE BEGIN SysTick_IRQn 0 */
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/* USER CODE END SysTick_IRQn 0 */
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HAL_IncTick();
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/* USER CODE BEGIN SysTick_IRQn 1 */
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/* USER CODE END SysTick_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32H7xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32h7xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 stream3 global interrupt.
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*/
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void DMA1_Stream3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
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DMA1_Stream3->NDTR = (uint16_t) (N_MEAS+1)*2; // send signle bytes (+ begin position)
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DMA1->LIFCR = 0xffffffff;
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DMA1->HIFCR = 0xffffffff;
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/* USER CODE END DMA1_Stream3_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart3_tx);
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/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
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// empty results array for the next run
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/* USER CODE END DMA1_Stream3_IRQn 1 */
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}
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/**
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* @brief This function handles USART3 global interrupt.
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*/
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void USART3_IRQHandler(void)
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{
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/* USER CODE BEGIN USART3_IRQn 0 */
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ESPE_USART_interrupt();
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/* USER CODE END USART3_IRQn 0 */
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HAL_UART_IRQHandler(&huart3);
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/* USER CODE BEGIN USART3_IRQn 1 */
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/* USER CODE END USART3_IRQn 1 */
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}
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/**
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* @brief This function handles TIM6 global interrupt, DAC1_CH1 and DAC1_CH2 underrun error interrupts.
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*/
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void TIM6_DAC_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM6_DAC_IRQn 0 */
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/* USER CODE END TIM6_DAC_IRQn 0 */
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HAL_TIM_IRQHandler(&htim6);
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/* USER CODE BEGIN TIM6_DAC_IRQn 1 */
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/* USER CODE END TIM6_DAC_IRQn 1 */
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}
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/**
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* @brief This function handles TIM7 global interrupt.
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*/
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void TIM7_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM7_IRQn 0 */
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SEMAPHORE_TIM7_interrupt();
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/* USER CODE END TIM7_IRQn 0 */
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HAL_TIM_IRQHandler(&htim7);
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/* USER CODE BEGIN TIM7_IRQn 1 */
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/* USER CODE END TIM7_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream0 global interrupt.
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*/
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void DMA2_Stream0_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
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// reset DMA to inital state
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//DMA2_Stream0->NDTR |= (uint16_t) N_MEAS;
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FULL = 1;
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DMA2->LIFCR = 0xffffffff;
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DMA2->HIFCR = 0xffffffff;
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if(0){
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/* USER CODE END DMA2_Stream0_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_adc3);
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/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
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}
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/* USER CODE END DMA2_Stream0_IRQn 1 */
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}
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/**
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* @brief This function handles ADC3 global interrupt.
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*/
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void ADC3_IRQHandler(void)
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{
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/* USER CODE BEGIN ADC3_IRQn 0 */
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// mettere il codice direttamente qua aiuta con la velocità di campionamento
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// TODO: dovresti segnalare che ADC è pronta per la lettura al resto del codice
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tmp = ADC3->DR;
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if(TA & FULL){
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// trigger attivo
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if(indx == N_POST){
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TIM6->CR1 &= ~(TIM_CR1_CEN); // stop timer
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TA = 0;
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FULL = 0;
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indx = 0;
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}else{
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indx++;
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}
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}else{
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// trigger logic
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if(tmp < TH_lo){
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// trigger ready
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TR = 1;
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}else if( (tmp > TH_hi) & (TR == 1) ){
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// trigger active
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TR = 0;
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TA = 1;
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POS = N_MEAS - DMA2_Stream0->NDTR -1;
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results[100] = POS;
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/*
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if (POS < N_PRE){
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results[100] = (uint16_t) POS + N_POST;
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}else{
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results[100] = (uint16_t) POS - N_PRE;
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}*/
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}
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}
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// TODO: necessary?
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ADC3->ISR |= ADC_ISR_EOC;
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//ADC3->CR |= ADC_CR_ADSTART;
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// escludi questa funzione, sempre per questione di velocità
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#if(0)
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/* USER CODE END ADC3_IRQn 0 */
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HAL_ADC_IRQHandler(&hadc3);
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/* USER CODE BEGIN ADC3_IRQn 1 */
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#endif
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/* USER CODE END ADC3_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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